Many communications systems employ a power amplifier to increase the power level present in a signal to be transmitted over a channel. The power amplifier may drive, for example, an antenna. The efficiency of a power amplifier determines the portion of power provided to a power amplifier that is included in the output of the power amplifier. The greater the efficiency of a power amplifier, the more effectively energy is converted into signal energy rather than being dissipated as heat. Furthermore, the greater the efficiency, the less power a device may consume to provide a desired output power level. This is particularly important in battery operated devices where wasted power shortens the useful life of each charge on the battery.
Many modern communication protocols, such as Code Division Multiple Access (CDMA) and IEEE 802.11 a/g protocols, use signals with a varying envelope. The peak-to-average ratio could be as large as 10–12 dB. To maintain linearity, the amplifier operating level is “backed off” from its compression point by at least the amount of the PAR of the signal. As a result, the efficiency becomes a problem. The efficiency of a Class AB amplifier drops at a rate of approximately 0.5 dB for every 1 dB of back off. In general, for a 10 dB back off in Class AB amplifiers, the average power efficiency becomes less than twenty percent. For Class A amplifiers, the average power efficiency may be on the order of only 5 to 8 percent. Thus, only twenty percent (or less) of the consumed DC power is converted into Radio Frequency (RF) power (the remainder is converted into heat).
The PAR-linearity-efficiency problem is a long-standing one. Many solutions have been proposed or suggested. The only widely deployed power-efficient amplifier solution is referred to as the “Doherty Amplifier,” suggested by William H. Doherty in 1935. For a detailed discussion of the Doherty amplifier, see, for example, Raab et al., “RF and Microwave Power Amplifier and Transmitter Technologies—Part 3,” High Frequency Electronics, (September 2003). Generally, the Doherty amplifier obtains peak efficiency at a back-off of 0 dB and at least one other power level. The Doherty amplifier uses two separate active stages (amplifiers) that are coupled at their inputs and their outputs directly into a single load impedance. The Doherty amplifier achieves high efficiency by operating one Class AB amplifier into a load impedance two times larger than its optimum. This amplifier compresses and reaches peak efficiency at half of its maximum output power. A second Class C amplifier is made active only during the peaks of the input signal and is used to modulate the effective load impedance presented to the first amplifier. Maximum efficiency is achieved when the second amplifier puts out full power. Thus, the first amplifier is kept on the verge of saturation for a 6 dB range of output power and near peak efficiency is maintained.
The input coupling of the Doherty amplifier requires a specialized quadrature power splitter that is cumbersome to implement on silicon (i.e., with on-chip lumped components). Very few on-chip Doherty amplifiers have ever been reported. Furthermore, there is a dramatic change in the input impedance of the Class C stage when the amplifier transitions from a “non-amplification” mode into an amplification mode. Due to the input coupling, this change could disturb the operation of the main Class AB stage, resulting in an overall gain change and distortion.
A need therefore exists for power amplifiers that demonstrate improved linearity and efficiency in applications requiring significant peak-to-average ratios.